Daily Update - May 21st, 2026
Nvidia earnings, ASML high-NA EUV, Alibaba, AMD ramps Venice, Intel's new firing policy.
Nvidia earnings is out and often serves as a weather forecast for AI semis. All sunny so far. ☀️ ASML high-NA EUV chips linger on the horizon, Alibaba’s new AI chip, and AMD ramps Venice on TSMC 2nm. Intel’s new firing policy? Tough.
Also some nice tables and charts, and a great interview!
Be sure to check out the Semi Doped podcast on YouTube or your favorite podcast player!
Nvidia posts record $82 billion quarterly revenue
Nvidia reported first-quarter fiscal 2027 revenue of $82 billion, up 85% from a year earlier and 20% from the prior quarter, marking its 14th straight quarter of sequential growth. Finance chief Colette Kress said the next-generation Vera Rubin platform remains on track for the second half of the year, with production ramping in the third quarter. Chief executive Jensen Huang said Nvidia has “largely conceded” China’s AI chip market to Huawei, citing uncertainty over export approvals. (Nvidia)
Vik: Jensen just wrote off a chunk of TAM to China that was never coming back anyway, so I’d rather watch the Vera Rubin ramp in Q3 — that’s the catalyst that decides whether the 14-quarter streak holds into 2027. If Rubin slips (Colette swears it won’t), the sequential-growth narrative is the first thing to crack.
ASML expects first High-NA EUV chips within months
ASML CEO Christophe Fouquet said the first chips made with the company’s High-NA EUV lithography machines, spanning both memory and logic, will enter production within the next few months. Each High-NA system carries a price of roughly US $400 million. TSMC has delayed adopting the technology, citing the high cost, while Intel and SK Hynix are among the chipmakers moving ahead with the tools.
Austin: I was surprised to see memory makers eager for expensive High-NA EUV, but it makes sense if High-NA can reduce exposures and make a denser DRAM cell. And presumably future HBM generations (ie HBM5) will have high enough ASPs to offset the increased tool price.
Vik: We talk about the skyrocketing costs of EUV on our next Semi Doped podcast! Stay tuned.
Alibaba unveils AI chip for training, inference
Alibaba Group has unveiled a new artificial-intelligence chip designed to handle both model training and inference, according to Bloomberg. The processor is intended to support a broader range of AI workloads than the company’s earlier silicon, which was geared mainly toward inference tasks. Alibaba develops its in-house chips through its T-Head semiconductor unit. The disclosure comes as Chinese technology firms expand domestic chip-design efforts amid US export restrictions that limit their access to advanced processors from suppliers such as Nvidia. Alibaba did not detail the chip’s manufacturing partner, production timeline, or performance specifications in the announcement. (Bloomberg Tech)
Austin: Alibaba trains frontier models (Qwen), has a cloud (Alibaba Cloud), and is making it’s own AI accelerators. Reminds me of Google (Gemini, Google Cloud, TPUs).
Which fab? Presumably SMIC, which means a 7nm class process node. Not a blocker, many startups are on older nodes. Of course, if we’re comparing to Google, TPU has the privilege of TSMC N3.
AMD ramps Venice EPYC chips on TSMC 2nm
AMD has begun the production ramp of its 6th-generation EPYC server processor, codenamed “Venice,” on TSMC’s 2nm (N2) process technology, the company announced. Venice is the first high-performance computing CPU to enter production at TSMC on the 2nm node. The processor is built using AMD’s chiplet design and is slated for AMD’s “Zen 6” architecture, targeting AI and data center workloads. AMD said it has successfully brought up first silicon and validated the design, with the chips manufactured at TSMC’s facilities. The launch positions AMD among the early adopters of TSMC’s most advanced process node. (AMD)
Vik: This has got to mean good things for the CPU demand right? AMD has money to be made on Venice ramp. It’s an amazingly powerful processor — 256 cores, 512 threads — can run agents all day.
Quick Hits
Computing
Intel launched its Core Ultra Series 3 platform, positioning the processors as a new standard for edge AI and robotics compute. (Intel Newsroom)
AMD added Ryzen AI Max PRO 400 series chips supporting up to 192GB of memory for AI workstation and edge systems. (ServeTheHome)
SemiFive signed a 14.7 billion won contract to develop a custom AI semiconductor, expanding its design-platform services business. (The Elec)
Infrastructure
Mikros Technologies and Carbice are adapting International Space Station thermal technology to solve heat-dissipation challenges in AI data centers. (EE Times)
Power
Nebius partnered with Bloom Energy to supply on-site fuel-cell power for its AI data center build-out; Bloom shares climbed on the deal. (Nebius)
LS Electric won a 96 billion won contract to supply high-voltage switchgear for a US data center microgrid project. (The Elec)
Samsung Electronics is revising its GaN power semiconductor strategy, shifting focus away from devices toward a foundry model for gallium nitride chips. (The Elec)
Networking
Astera Labs ALAB 0.00%↑ shares hit a record high after reporting 93% year-over-year revenue growth driven by a surge in AI connectivity demand.
Credo and Korean AI chip startup Rebellions announced a collaboration to maximize operational efficiency in enterprise AI factories using Credo’s connectivity products. (Credo IR)
Hiring & Layoffs
Intel CEO Lip-Bu Tan imposed aggressive new chip-quality standards, warning that major validation errors can result in employee termination. (X (@DanielNenni)) Screenshot via techfund1 on X.
Key Data
Morgan Stanley BoM analysis on NVIDIA Vera Rubin. Memory on VR200 is 25% of BoM. Via @Aaronwei3n on X.
Another funny chart. Mentions of “CPU” on Nvidia conference calls. Via @jerkstore on TMTB Slack.
Gavin Baker on Invest Like The Best
A must watch. We already posted a Gavin interview this week. This one is much longer, and is filled with insights — all clearly communicated, Gavin style.